Espressif Systems IoT ESP32 WIFI & Bluetooth Module

Overview

Created by Espressif Systems, ESP32 is a low-cost, low-power system on a chip (SoC) series with Wi-Fi & dual-mode Bluetooth capabilities! The ESP32 series of chips presently includes ESP32-D0WDQ6 (and ESP32-D0WD), ESP32-D2WD, and ESP32-S0WD. At its heart, there's a dual-core (or single-core) Tensilica Xtensa LX6 microprocessor with a clock rate of up to 240 MHz. ESP32 is highly integrated with built-in antenna switches, RF balun, power amplifier, low-noise receive amplifier, filters, and power management modules. Engineered for mobile devices, wearable electronics, and IoT applications, ESP32 achieves ultra-low power consumption through power saving features including fine resolution clock gating, multiple power modes, and dynamic power scaling.

Features

• Main Processor: Tensilica Xtensa 32-bit LX6 microprocessor
  • Cores: 2 or 1 (depending on variation)
    All chips in the ESP32 series are dual-core except for ESP32-S0WD, which is single-core.
  • Clock Frequency: up to 240 MHz
  • Performance: up to 600 DMIPS
• Wireless Connectivity
  • Wi-Fi: 802.11 b/g/n/e/i (802.11n @ 2.4 GHz up to 150 Mbit/s)
  • Bluetooth: v4.2 BR/EDR and Bluetooth Low Energy (BLE)
• Low Power: Low power options utilize the ULP co-processor to ensure that you can still do ADC conversions, computation, and level thresholds while in deep sleep.
• Memory
  • Internal Memory
    • ROM: 448 KiB
      For booting and core functions.
    • SRAM: 520 KiB
      For data and instruction.
    • RTC Slow SRAM: 8 KiB
      For co-processor accessing during deep-sleep mode.
    • RTC Fast SRAM: 8 KiB
      For data storage and main CPU during RTC Boot from the deep-sleep mode.
    • eFuse: 1 Kibit
      Of which 256 bits are used for the system (MAC address and chip configuration) and the remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID.
    • Embedded Flash: 0 MiB or 2 MiB (depending on variation)
      ESP32-D2WD has 2 MiB of embedded flash, internally connected via GPIO16, GPIO17, SD_CMD, SD_CLK, SD_DATA_0 and SD_DATA_1. The other chips in the ESP32 series have no embedded flash.
  • External Flash and SRAM: ESP32 without embedded flash supports up to 4 × 16 MiB of external QSPI flash and 8 MiB SRAM with hardware encryption based on AES to protect developer's programs and data.
    ESP32 chips with embedded flash do not support the address mapping between external flash and peripherals.
• Peripheral Input/Output: Rich peripheral interface with DMA that includes capacitive touch, ADCs (analog-to-digital converter), DACs (digital-to-analog converter), I²C (Inter-Integrated Circuit), UART (universal asynchronous receiver/transmitter), CAN 2.0 (Controller Area Network), SPI (Serial Peripheral Interface), I²S (Integrated Inter-IC Sound), RMII (Reduced Media-Independent Interface), PWM (pulse width modulation), and more.
• Security
  • IEEE 802.11 standard security features all supported, including WFA, WPA/WPA2 and WAPI
  • Secure boot
  • Flash encryption
  • 1024-bit OTP, up to 768-bit for customers
  • Cryptographic hardware acceleration: AES, SHA-2, RSA, elliptic curve cryptography (ECC), random number generator (RNG)

Documents

• ESP32.net

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